India trained 85,000 engineers in 4 years under Semicon 2.0: Vaishnaw

Prioritising talent development under the Government of India's Semiconductor Mission, Union Minister for Railways and Electronics & IT, Ashwini Vaishnaw, stated that India has achieved its 10-year target of training 85,000 engineers in semiconductor design in just 4 years.The Minister on Monday informed that world-class Electronic Design Automation (EDA) tools, Cadence, Synopsys, and Siemens, have been made available in 315 universities across the country, and with the help of these tools, students are designing actual semiconductor chips, according to a release.These chips are being fabricated and tested at the Semiconductor Laboratory (SCL) in Mohali, giving students hands-on experience across the entire process from design to manufacturing and validation, he said.Vaishnaw further stated that students from universities across the nation, from Assam to Gujarat and from Kashmir to Kanyakumari, are actively engaging in semiconductor design. This marks a significant milestone ...